This invention relates to a process for producing a multilayer printed circuit board.
Multilayer printed circuit boards are produced by laminating a plurality of inner layer plates obtained by forming circuits on copper-clad laminates and a plurality of single-sided copper-clad laminates or copper foils via prepregs obtained by impregnating glass cloth as a base material with a resin, followed by pressing with heating to cure with heating, and forming circuits on outer surfaces of the integrated copper-clad laminates containing inner layer circuits therein.
With the recent tendency towards miniaturization, higher performance, and increased functions of electronic devices, multilayer printed circuit boards have become higher in density, thinner in individual layers, finer in wiring, smaller in the diameter for connecting individual layers, and have come to use interstitial via holes (hereinafter referred to as "IVHs") for connecting only neighboring wiring layers. Now, in order to make wiring density higher, a smaller diameter of IVH is required.
A prior art multilayer printed circuit board having IVHs is produced by laminating an inner layer circuit substrate 1 obtained by forming a circuit on a copper-clad laminate and a pair of single-sided copper-clad laminates or copper foils 3 via a plurality of prepregs 9 as shown in FIG. 2A, adhering under pressure, with heating, to give an integrated copper-clad laminate having interlayer circuits therein as shown in FIG. 2B, drilling holes on predetermined positions so as to reach the interlayer circuits to form holes 5 for IVH as shown in FIG. 2C, if necessary, drilling a through hole 6 according to a prior art process as shown in FIG. 2D, connecting the interlayer circuits and outer layer copper foils by electroless copper plating and electric copper plating 7 as shown in FIG. 2E, forming etching resists 8 on the outer layer copper foils as shown in FIG. 2F, conducting selective etchings as shown in FIGS. 2G and 2H, and removing the etching resists as shown in FIG. 2I.
According to prior art processes, polyimide films are used as a material capable of chemical etching using hydrazine, etc. as disclosed, for example, in JP-A 50-4577, JP-A 51-27464, JP-A 53-49068, etc. Further, processes for etching epoxy resin cured articles used for printed circuit boards using concentrated sulfuric acid, chromic acid, permanganic acid, etc. (surface roughness, smear treatment) are disclosed, for example, in JP-A 54-144968 and JP-A 62-104197.
According to the prior art processes for forming holes for IVH, since holes are drilled until interlayer circuits are reached, it is impossible to conduct the drilling by laminating a plurality of printed circuit boards, in contrast to drilling of through holes. Thus, the drilling is conducted one after another, requiring a long period of time and rendering poor productivity. Further, in order to control the depth of the point of the drill, the point of the drill coincides with the depth of the copper wiring patterns. Since there is a variation in thickness of multilayer printed circuit boards, in some cases the interlayer circuits are reached and in some cases they are not. In the case of a thin intralayer thickness, holes contact with a wiring circuit of the layer thereunder, result in a defective electrical connection. In addition, when holes of 0.3 mm or less in diameter are drilled, the life of drill is remarkably shortened due to loss of core center and from working of resin layers containing a glass cloth substrate.
On the other hand, according to prior art chemical etching methods, the use of hydrazine is not preferred due to its toxicity, and the use of concentrated sulfuric acid, chromic acid or permanganic acid is not preferred due to designation of special chemical substances. These chemical substances should be avoided from the viewpoint of safety.